Requires the latest
qbraid pre-release: pip install --upgrade --pre qbraid. Calibration data is refreshed from each hardware provider roughly
hourly.Fetching calibration data
EveryQbraidDevice has two entry points:
coupling_map is the device’s physical connectivity: sorted, deduplicated
(source, target) qubit pairs, derived from the calibrated two-qubit gate
edges. It is cached on the device instance, since hardware topology does not
change between calibrations.
get_calibrations() returns the full live snapshot and always fetches fresh
data. The two most useful fields:
None for devices without published calibration data, such as
simulators.
Devices with calibration data
All device IDs that map to the same physical hardware share one calibration
snapshot, so
rigetti:rigetti:qpu:cepheus-1-108q and
aws:rigetti:qpu:cepheus-1-108q return identical data.A device can have calibration data with an empty edge list. AQT’s Ibex-Q1 is a
trapped-ion system with all-to-all connectivity, so there are no discrete
coupling edges to report:
coupling_map returns an empty tuple, not None.
For IonQ trapped-ion devices, see device.profile.characterization instead.Plotting the connectivity graph
Theqbraid.visualization module renders the graph in one call, colored by
live calibration data. Edges are colored by two-qubit gate error and nodes by
readout error, on a single-hue scale where darker is better, matching the
topology view in qBraid Lab:

topology config, so square
lattices (Rigetti) and clipped lattices (IQM) both render their true physical
geometry; devices without a lattice config fall back to a force-directed
layout. To build a custom plot, the lattice_positions helper maps qubit ids
to grid coordinates from the same config:

Choosing the best qubits
With the calibration data in hand, qubit selection becomes a graph problem. Build a weighted graph from the coupling map, then the single best-calibrated pair is one line:The lowest CZ error is not always the best place to run. Readout error varies
by an order of magnitude across the lattice, and on some snapshots the best-CZ
edge sits on a qubit with weak readout. For two-qubit circuits, score edges on
the product of CZ, readout, and single-qubit fidelities; see Scoring
edges for a worked
example where the two rankings disagree on hardware.
n qubits, search for the connected chain that
minimizes the summed two-qubit error:

Running on the qubits you chose
Rigetti direct: hand-placed native gates
On the Rigetti direct path, programs that bypass quilc must already use native gates on physical qubits, which is exactly what the coupling map enables. A Bell pair on the best-calibrated edge:00 and 11) came back at 88 percent on hardware,
consistent with the roughly 0.4 percent CZ error and few-percent readout error
of the chosen pair.
This program contains no timing instruction, so it takes the compiled
path. The placement survives because its qubits already fit the topology,
which makes quilc default to identity (
NAIVE) rewiring; quilc is not
obligated to keep it in general. To make placement a guarantee rather than a
default, add a clock-aligned delay to take the direct path, or pin the
compiled path with PRAGMA INITIAL_REWIRING "NAIVE". See Pinning the
circuit.Qiskit: constrain transpilation to the real topology
If you would rather let a transpiler do the routing, feed the coupling map to Qiskit and pin your circuit to the chain you selected. This works for any gate-model device on qBraid:Related links
- QbraidProvider: setup and credentials
- Rigetti Cepheus-1-108Q: native gates, Quil-T timing, and the two compilation paths
- Job execution: single, batch, and group submission
- Visualization: histograms and other built-in plotting utilities

